1. Technical Field
Embodiments of the present invention generally relate to a semiconductor device and an operating method thereof, and more particularly, to a semiconductor device capable of scheduling read and write operations of a semiconductor memory device, and an operating method thereof.
2. Related Art
A semiconductor memory device like a Dynamic Random-Access Memory (DRAM) is normally controlled by a memory controller. The memory controller includes an arbitration block to schedule read requests and write requests from host.
Conventional memory controllers generally process read requests before write requests and the write requests have priority only when the number of write requests waiting in the queue is larger than a predetermined threshold value.
But the conventional memory controllers do not consider addresses of the read and write requests, which results in limiting the efficiency of the semiconductor memory device.